Design of Bandgap voltage reference (BGR) - 12 : Simulation of BGR start up circuits

Summary

In this enlightening video, Hafeez KT walks us through the simulation of startup circuits for bandgap voltage references (BGR). Although simulations often neglect the zero current state, potentially hiding startup issues, Hafeez explains the necessity of designing startup circuits for every self-bias circuit to guarantee proper functionality in silicon. The video covers DC and transient analysis, demonstrating the common pitfalls when simulating without a startup circuit. Additionally, Hafeez showcases several topologies and the impact of correctly implemented startup circuits, ensuring the BGR operates consistently at the required reference voltage. This technical yet engaging session underscores the importance of proactive design strategies in creating reliable circuits.

Highlights

• Startup circuits help prevent circuits from getting stuck in zero current states, crucial for real-world applications. 🚦
• Simulations can mislead designers by bypassing startup issues, making physical testing and proactive design critical. 💡
• Utilizing transient analysis reveals potential startup issues unseen in default simulations. 🔍
• Exploring different BGR topologies shows varying behavior, emphasizing diverse design strategies. 🌐
• Properly designed startup circuits ensure that the reference voltage reaches its intended target efficiently. 🎯

Key Takeaways

• Even if simulations appear successful, they can miss startup issues that only manifest in physical circuits. 🛠️
• Designing a startup circuit is essential for ensuring proper operation in silicon, despite simulations showing no issues. 📐
• A variety of startup circuit topologies can be used, depending on the specific requirements and constraints of the BGR design. 🔧
• The size of certain components in startup circuits isn't critical, focusing instead on their functionality and timing. ⏱️
• Proactive design strategies in electronic circuits can save time and resources during fabrication and testing. 📊

Overview

In the video, Hafeez KT addresses the often-overlooked issue of startup circuits in the design of bandgap voltage references. He explains that while simulations might not highlight zero current states, failing to incorporate a startup circuit can result in malfunction when the design is transferred to silicon. Through detailed DC and transient analyses, Hafeez demonstrates situations where a startup circuit is needed to disturb zero-current operating points and achieve reliable operation.

Hafeez presents different topologies of BGR and shows various approaches to designing startup circuits. The transient analysis, in particular, exposes the limitations of simulations, where apparent success could lead to real-world failures without appropriate circuit designs. The discussion highlights the nuances in designing components of the startup circuit, such as the MOSFET size and resistor value, emphasizing their roles rather than their dimensions.

Overall, this educational content serves as a solid guide to understanding the essential role of startup circuits in electronic design, particularly for bandgap references. The video not only expands on technical aspects but also provides practical insights into solving real-world circuit issues. It’s a must-watch for anyone keen on enhancing their circuit design with proactive strategies and ensuring robust, reliable performance in integrated circuits.

Chapters

• 00:00 - 00:30: Introduction to Startup Circuit Simulation In this chapter, an introduction to startup circuit simulation is presented, with a focus on a band gap reference circuit. It is explained that detecting the necessity of a startup circuit is challenging within simulations because most simulators tend to avoid the zero-current state. Consequently, simulations may show everything working fine, but this does not guarantee functionality when implemented in silicon.
• 00:30 - 01:00: DC Simulation Setup The chapter highlights the importance of designing a startup circuit for every self-bias circuit in a simulation. It reflects on a previous design, a band gap reference, and the necessity to perform a DC simulation. The simulation involves sweeping the temperature from -40 to 125 degrees Celsius and plotting relevant data.
• 01:00 - 01:30: DC Simulation without Startup Circuit The chapter discusses performing a DC simulation of a circuit to obtain the reference voltage. It is noted that the reference voltage achieved is approximately 1.2 volts. The focus of the simulation is on analyzing the circuit without the inclusion of a startup circuit. It is explained that in this DC simulation, the simulator does not demonstrate the need for a startup circuit.
• 01:30 - 02:00: Transient Analysis for Startup Issues The chapter titled 'Transient Analysis for Startup Issues' focuses on understanding the importance and implications of startup circuits in system design. The transcript introduces the necessity of performing a transient analysis to identify potential startup problems. It discusses the technique of avoiding a zero current state and emphasizes conducting transient studies to uncover startup-related issues. A specific transient of 500 microseconds is set for analysis, indicating a detailed exploration of the system's behavior during startup.
• 02:00 - 02:30: Voltage and Current Plotting In the 'Voltage and Current Plotting' chapter, the focus is on the behavior of a circuit when a pulse signal is introduced instead of a direct current (DC) value. Initially, the circuit receives no voltage, simulating a power-off state. At a specified time interval, the pulse signal turns on the supply, allowing for the observation of startup issues typically associated with the initial application of supply. This setup replaces a constant voltage (VDC) with a pulse voltage (V pulse) to study these phenomena effectively.
• 02:30 - 03:00: Identifying Startup Issues In the chapter titled 'Identifying Startup Issues,' the discussion revolves around setting initial conditions and parameters for a startup process in a system. The speaker mentions giving a significant delay time of 100 microseconds, specifying both delay and rise times, along with a pulse width of 0.5 seconds. Before any analysis, the reference voltage (vdd) is plotted as a critical step in identifying and understanding startup issues.
• 03:00 - 03:30: Designing the Startup Circuit The chapter titled 'Designing the Startup Circuit' delves into the intricacies of designing a startup circuit. It begins by discussing the reasons behind certain design choices, particularly the use of a pulse wave. The narrative explains the initial setup of the simulation, highlighting that at the start, the voltage (V) is zero, indicating that the integrated circuit (IC) is off. Subsequently, the supply voltage is applied to the system, which is a crucial step in the design and simulation process.
• 03:30 - 04:00: Startup Circuit Simulated Outcome This chapter discusses the simulated outcome of a startup circuit within an integrated circuit (IC). Initially, the supply voltage is set to 0 volts and eventually rises to 3.3 volts, which reflects the transient case that occurs in real-life testing scenarios. When conducting a test on an IC, the supply is initially at zero and then powered on, mimicking real operational conditions. There is a focus on plotting the reference voltage, which illustrates transient issues, emphasizing the unpredictability and lack of guarantees during this phase.
• 04:00 - 04:30: Ensuring Minimal Current Flow in Startup The chapter discusses the challenges of ensuring minimal current flow during the startup of a simulator. It highlights a specific startup issue where the reference voltage fails to reach the expected 1.2 volts, indicating potential discrepancies between simulation results and real Silicon performance.
• 04:30 - 05:30: Exploring Different Topologies This chapter delves into the concept of electrical topologies, focusing on the voltages and currents within a circuit. It particularly addresses an issue where the expected voltage is only reaching 300 to 350 millivolts instead of the anticipated 1.2 volts. The explanation provided suggests that this discrepancy is due to certain nodes being near zero or close to Vdd (the supply voltage), resulting in no voltage threshold difference. Consequently, the current flowing through the MOSFET is described as negligible, which affects the circuit's performance. The discussion highlights the importance of understanding node voltages and current flows in designing efficient circuitry.
• 05:30 - 06:30: Simulating Various Bandgap References This chapter discusses the simulation of various bandgap references, focusing on issues such as current leakage and circuit functionality. It also includes an analysis of voltage levels, highlighting that node voltage is slightly less than VDD, even when expected to be very near to it.
• 06:30 - 07:30: Analysis of Additional Topologies This chapter discusses the analysis of additional topologies in electrical circuits, focusing particularly on the voltage difference between Vdt and another point, which is around 25 to 3 volts. This difference is less than the threshold voltage, resulting in only a negligible amount of current flow.
• 07:30 - 09:00: Final Notes on Bandgap Reference The chapter discusses the behavior of MOSFETs when they are not in saturation, leading to a small current flow. It mentions that current can be plotted through three branches, implying a focus on analyzing current flow within a circuit configuration.

Design of Bandgap voltage reference (BGR) - 12 : Simulation of BGR start up circuits Transcription

• 00:00 - 00:30 hi in this video we will simulate the startup circuit for the band Gap refer when we design the startup circuit we said that it is hard to detect the necessity of the startup circuit in the simulations because most of the simul simulator will avoid the zero current state and when we simulate everything will be fine but it doesn't guarantee that when we do the IC in Silicon it will work so even though if we cannot
• 00:30 - 01:00 see the necessity of the startup circuit in the simulation we should design a startup circuit for every uh Self Bias circuit so this is our uh band Gap reference that we designed earlier so let us simulate it once again uh first let us do the DC simulation and uh spping the temperature from - 40 to say 125° and and uh we need to plot the
• 01:00 - 01:30 output the reference voltage and let us simulate the circuit we got the reference voltage near to 1.2 volt and this is without any startup circuit so in the DC simulation we said uh the simulator will not show the necessity of the startup circuit it will
• 01:30 - 02:00 automatically avoid the zero current state so to see the necessity of the to see the significance of the startup circuit uh we said we will do the transient analysis so there is a chance for us to see the issue of startup in the transient analysis so I am giving a transient of 500 microc I'm dis aing the DC and instead
• 02:00 - 02:30 of giving a DC value I am giving a pulse signal here that means initially it will be zero that means there is no Supply then we turn on the supply after a particular time interval and in that case we can uh expect that we will see the startup issue so instead of VDC I giving V pulse here and uh initially I want the voltage to be
• 02:30 - 03:00 zero and after some time I want it to be the VD and period I giving a huge time period delay second delay I'm giving 100 microc delay and I give I'm giving 100 microc rise time also F time and pulse withd doesn't matter and I'm giving .5 second as the pulse width before plotting the reference voltage let us plot the vdd
• 03:00 - 03:30 first so then you can understand why we give this much uh this kind of a pulse wave here so we need to plot the vdd so let us run the simulation so this is what we wanted initially the V is zero that means the IC is turned off and now we apped the supply to the
• 03:30 - 04:00 IC so that the supply voltage went to 3.3 volt so this is the transient case this will happen in reality when you make an IC and if you want to test the IC first you initially the supply will be zero and you will turn on the supply and this will happen uh in reality okay so now if you plot the reference voltage you can see the issue of we expect we can see the issue of transient there's no guarantee that uh
• 04:00 - 04:30 the simulator will show the issue I I'm repeating that even though the simulator is starting now uh it doesn't mean that uh it will work properly in Silicon so let us plot the reference voltage and you can see the reference voltage is not uh coming to 1.2 volt that is the startup issue is here startup issue is present here that means um you can see the the out reference
• 04:30 - 05:00 voltage is coming only to 300 or 350 Mt so it is not going to 1.2 volt so we said what is the reason we said the reason for this is this node will be near to zero that is less than threshold voltage and this node will be near to vdd and there will not be a vth difference uh in between the vdd and this node so the current flowing through this to through this mosfet will be very small current that me only negligible
• 05:00 - 05:30 current leakage current will be flowing so the circuit will not function properly so let us analyze the current and uh the voltages also so I want to plot the voltage here we said it will be very near to vdd so we'll plot both vdd and this node voltage so you can see it is not exactly vdd but little bit less than vdd but not uh
• 05:30 - 06:00 uh the difference between vdt and this is near to 25 or3 volt of course this is less than the threshold voltage so only a negligible Val uh only a small amount of current will be flowing so now we can plot the Gate of the enoses also so it is also very near to ground that is 250 Mt only it is also below threshold value so a sub thresold
• 06:00 - 06:30 current only a small value of current will be flowing so uh these mosfets are not in saturation now as a result the current flowing through is uh very small we can plot the current also for that we have to uh select this current current through the three branches and let us plot them
• 06:30 - 07:00 so you can see the current through the branches is in Pico ampers only it is not even coming to you know nanoampere or we designed we really designed it for one or 2 micro ere but now it is coming only the Pico ere range so you can see the current is 1.14 poo ere only so in the transan analysis uh we showed that the circuit will not fun will not function properly without a startup
• 07:00 - 07:30 circuit so now we have to design a startup circuit for uh this circuit so uh as we discussed in the theory session uh we can start up we can design a startup socute very quickly we need a an Enos here I'm just copying the Enos from here so again the size of this Enos how much it should be it is not a big design issue the uh because the startup
• 07:30 - 08:00 circuit will function only for a small amount of time so the size of this uh mosfet is not very significant so you can give a you need not give a big mosfet here and you don't need a matching on or those things so you can reduce the size of the mosfet so I'm giving a very small mosfet here and we said we will connect this Moser
• 08:00 - 08:30 to the gate of the pimos so that it will pull down the Gate of the pimos to ground it will try to pull down the voltage to ground and the Gate of this posos sorry the Gate of this Enos we want to control this using another Enos
• 08:30 - 09:00 and the Gate of this Enos is connected to this node and uh we need a higher resistance I'm just copying this resistor here
• 09:00 - 09:30 so this resistance value is too huge we don't need this much uh this much huge resistance here so let us tie with uh 10 Kil of resistor and let's let us check whether it will work properly or not we need to save all the current so output to be saved select on schematic
• 09:30 - 10:00 so we designed the startup circuit and we said we need a big resistor over here and weig big mosfet uh here big and most so I'm making this little bit big and uh let us run the simulation and we want to we are ploting the reference voltage now you can see the reference voltage came to 1.2 volt so the start
• 10:00 - 10:30 there is no startup issue now the startup issue is solved and we Disturbed the initially the circuit struck at zero current operating point now we Disturbed the zero current operating point with the help of the startup circuit and now we want to analyze the startup circuit how much current is Flowing how much voltage is appearing in the nodes of the startup circuit so first of all we plot the
• 10:30 - 11:00 current through this mosfet so we want the current through this moset to be zero when the circuit is work functioning in the normal region so you can see the current is almost zero that is current is in 8 p ere only if in the normal region you cannot see that in the normal region it is only 8 p ere so only in this time some amount of current is
• 11:00 - 11:30 Flowing only during this time some current of some amount of current is Flowing to the Circuit so this is the time where the startup circuit is working so startup circuit will pump some current to the uh BGR and once the BGR is working properly then the startup circuit is turned off and um it is completely isolated from the uh band Gap reference so you can see the voltage of the you can see the gate
• 11:30 - 12:00 voltage of this nmos so initially it was some voltage uh before the BGR is working properly and once the startup is done and the band Gap reference is working normal then the this node potential is pulled down this gate voltage is pulled down by this mosfet and Below VT so it is one near to 150 Mt only so the mosfet is turned off
• 12:00 - 12:30 so uh this is the first topology that was that we discussed for the startup circuit now let us analyze uh other topologies so this is uh another topology of the band Gap reference that we discussed and uh here also we can first we can plot the DC analysis so we are doing the DC the temperature sweep we are doing fromus 40 to let's say 125
• 12:30 - 13:00 and uh you want to plot the output so here this is the reference voltage so let us run the simulation and we got the reference voltage near to 1.2 volt and uh I'm not doing the fine tuning we already simulated the Bap reference what we are interested is in the startup circuit so as we did earlier
• 13:00 - 13:30 uh let us make this to a pulse so instead of the a supply voltage as a DC we are giving a pulse here and uh initially we want the signal to be 0 volt and after that we need the supply voltage to reach to 1 Point reach to 3.3 volt 1 second time period And Delay and give giving again 100 microc rice time
• 13:30 - 14:00 also I'm giving 100 microc and the pulse withth .5 so by giving this uh we made our vdd uh as in the real case so let us plot the VD we ploted selectron schematic is the VD we need so in the transend and the video will look
• 14:00 - 14:30 like well let us make the analysis to transient and give this 500 microc disable the DC run the simulation so this is how the V Supply voltage will look like this is what we wanted initially we need the voltage to be zero then when we when we turn on the
• 14:30 - 15:00 IC uh the supply voltage will reach to 3.3 volt now we want to see how the reference voltage is behaving so let us run the simulation for reference voltage so there is no reference voltage coming uh it's again the issue of startup we said when uh it could be when the opamp output voltage is 0 volt and this two node will also be zero so it is stuck at zero current state and uh we need to design a startup
• 15:00 - 15:30 circuit here for that we said uh we need to forcefully pull up this node to some high value so that the opam will try to make this node also equal to this by pumping some current to the output so we need to pull up this node using a posos so I'm using a posos for that
• 15:30 - 16:00 we need a small pimos only so one end of the pimos we want to connect here
• 16:00 - 16:30 and uh other part of the vdd sorry not here we want to connect this to vdd and we need an nmos we need a big Enos here
• 16:30 - 17:00 to turn off the to turn off the startup circuit uh once the bandab reference is working properly so we connect this gate to here and uh we said we need a current mirror here
• 17:00 - 17:30 I copied the same mosfet so this is the exactly the same circuit
• 17:30 - 18:00 uh that we discussed in the theory session so this current mirror is made and we need a res uh resistor here and the resistor is grounded so let us uh run the simulation again we we
• 18:00 - 18:30 done with the startup circuit so let us run the simulation now you can see the reference voltage is near to 1.2 volt so before we designed the startup circuit the circuit was not reaching to 1.1 Vol 1.2 volt it was 0 volt in the output of the uh opamp now we got the the reference voltage as 1 1.2 volt this is
• 18:30 - 19:00 the this is a startup transion uh you can ignore that and the circuit will finally will settle to 1.2 volt and let us analyze the startup circuit as we expect uh initially this node potential will be below bdd and once the startup circuit has once the BGR has BGR started to function properly this node potential
• 19:00 - 19:30 should go to near to vdd so you can see initially it is was zero so after the startup after the BGR working properly uh this is near to vdd and there will there will not be any current flowing through this uh startup circuit so we have one more topology remaining in the band Gap reference uh that is this topology
• 19:30 - 20:00 so I'm saving the state so that we can use this again and we have to simulate this circuit first so first I want to
• 20:00 - 20:30 similar this for DC so the DC value we are giving 3.3 volt let's start the ad and now I am loading the state that we previously saved so this is the state that we saved so first I'm doing the DC analysis is
• 20:30 - 21:00 so output to ploted is the reference voltage here so let us run the simulation so it is working fine for the DC analysis you can see the bell shap shaped reference curve here and let us change the voltage source to pulse so this V
• 21:00 - 21:30 pulse initially it should be zero again then we need to we need 3.3 volt period 1 second I'm giving delay time 100 microc rise time also 100 microc and the pulse width 8 or any value so first of all Let's uh run the simulation to check the
• 21:30 - 22:00 vdd and VD is coming as we expected and now let us check what about the reference voltage so we need to PL the reference voltage output ploted we need the reference voltage so run the simulation again we don't want to plot the video now we are just interested in the
• 22:00 - 22:30 reference voltage here you can see the reference voltage is coming to 1.2 volt without any startup circuit so this is one typical case where uh even though without the startup circuit the simulator is showing that the circuit is working properly but it doesn't guarantee that uh if we simply make the circuit on the silicon and we turn on the power supply the circuit will work there is no guarantee for that so even though the simulator is not showing the
• 22:30 - 23:00 issue of startup we should design a startup circuit for the circuit because this a self ped circuit even though the simulator I repeat even though the simulator is not showing issue of startup we should design a startup circuit for this bandap reference also for this I'm not uh designing it again I'm just copying from the previous design because the topology is very similar we can use the same startup cute here
• 23:00 - 23:30 also delete this part and uh this to be connected here this is exactly what we did here and uh for the new topology also we can do the same so this is the St same startup circuit
• 23:30 - 24:00 that we did earlier so let us run the simulation again anyway it will work without the startup also now also we got the reference voltage as near to 1.2 volt so here uh with this video we are stopping the discussion on the bandap reference we designed we discussed the different types of bandab reference and we simulated different types of bandap
• 24:00 - 24:30 reference then we designed the startup circuit for different type of bandap reference and keep in mind that even though the circuit work fine without startup circuit in simulation it doesn't mean that it will work properly in Silicon we should design and add a startup circuit for every band Gap reference circuit so we are stopping the discussion of on band Gap reference here and uh thank you for watching